The present invention relates generally to an apparatus and a method for the transmission and sensing of signals in selected portions of semiconductor integrated circuits or chips containing a plurality of individual circuits therein. More particularly, the present invention is directed to a transmission and sensing circuit arrangement especially useful in measuring currents in selected portions of semiconductor Integrated circuits.
As is well known in the art, an Integrated circuit chip is comprised of a plurality of individual circuits and, as the elements forming the individual circuits in the integrated circuit chip have become smaller, each individual circuit in the chip also becomes denser causing an exponential increase especially in standby or quiescent currents in the chip and in each such individual circuit. Furthermore these increased currents contribute directly to excessive power dissipation in the chip and affects, through heating, the performance and reliability of the chip. Furthermore defective portions of integrated circuits often draw significantly increased current that can be used to identify defective portions of the integrated circuit. Therefore it is desirable, during the design and testing of an integrated circuit chip, to be able to accurately measure all such quiescent currents at numerous locations in a circuit or at different numerous locations in a plurality of different circuits throughout the chip in order to accurately measure the quiescent current in each circuit or selected portion thereof. In order to characterize and diagnose design or processing efficacy.
The prior art attempted to mitigate this problem by monitoring the current at multiple locations in such circuits while under test with built in current sensors (BICS). However, these prior art BICS have various shortcomings that adversely impact the circuits under test for they are interactive and thus introduce parasitic resistance, additional capacitance or inductance, while consuming unproductive chip area by requiring extra inputs and outputs, additional wiring, and tester hardware to transmit the current measurement data off-chip.
Accordingly, the present invention is designed to circumvent the above difficulties and avoid the above described difficulties encountered by the prior art. The present invention achieves these ends by providing a circuit layout and current-monitoring apparatus and a method that is passive, remote, has little or no parasitic electrical impact on the circuit under test, minimizes the impact on circuit layout, or area, and provides wide frequency response. The present invention also has minimal impact on circuit performance and provides analog current information from multiple locations simultaneously without crosstalk, interference, or noise.